Difference between revisions of "CAD"
From GhostBSD Wiki
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|[[https://svnweb.freebsd.org/ports/head/cad/alliance/pkg-descr?revision=HEAD]] [[https://www-soc.lip6.fr/equipe-cian/logiciels/alliance/]] | |[[https://svnweb.freebsd.org/ports/head/cad/alliance/pkg-descr?revision=HEAD]] [[https://www-soc.lip6.fr/equipe-cian/logiciels/alliance/]] | ||
|- | |- | ||
| − | | | + | |astk-client |
| − | |[[]] [[]] | + | |Graphical interface for Code_Aster (client side) |
| + | |[[https://svnweb.freebsd.org/ports/head/cad/astk-serveur/pkg-descr?revision=HEAD]] [[http://www.code-aster.org/]] | ||
|- | |- | ||
| − | | | + | |astk-serveur |
| − | |[[]] [[]] | + | |Graphical interface for Code_Aster (server side) |
| + | |[[https://svnweb.freebsd.org/ports/head/cad/astk-serveur/pkg-descr?revision=HEAD]] [[http://www.code-aster.org/]] | ||
|- | |- | ||
| − | | | + | |atlc |
| − | |[[]] [[]] | + | |Tool to calculate the impedance of transmission lines |
| + | |[[https://svnweb.freebsd.org/ports/head/cad/atlc/pkg-descr?revision=HEAD]] [[http://atlc.sourceforge.net/]] | ||
|- | |- | ||
| − | | | + | |basicdsp |
| − | |[[]] [[]] | + | |Program for experimenting with simple audio DSP algorithms |
| + | |[[https://svnweb.freebsd.org/ports/head/cad/basicdsp/pkg-descr?revision=HEAD]] [[http://wwwhome.cs.utwente.nl/~ptdeboer/ham/basicdsp/]] | ||
|- | |- | ||
| − | | | + | |brlcad |
| − | |[[]] [[]] | + | |CSG modelling system from the US Ballistic Research Laboratory |
| + | |[[https://svnweb.freebsd.org/ports/head/cad/brlcad/pkg-descr?revision=HEAD]] [[http://www.brlcad.org/]] | ||
|- | |- | ||
| − | | | + | |calculix |
| − | |[[]] [[]] | + | |Three-Dimensional Structural Finite Element Program |
| + | |[[https://svnweb.freebsd.org/ports/head/cad/calculix/pkg-descr?revision=HEAD]] [[http://www.calculix.de/]] | ||
|- | |- | ||
| − | | | + | |caneda |
| − | |[[]] [[]] | + | |EDA software suite focused on ease of use and portability |
| + | |[[https://svnweb.freebsd.org/ports/head/cad/caneda/pkg-descr?revision=HEAD]] [[http://caneda.org/]] | ||
|- | |- | ||
| − | | | + | |cascade |
| − | |[[]] [[]] | + | |Simple tool to analyze noise and distortion of a RF system |
| + | |[[https://svnweb.freebsd.org/ports/head/cad/cascade/pkg-descr?revision=HEAD]] [[http://rfcascade.sourceforge.net/]] | ||
|- | |- | ||
| − | | | + | |cascade-compiler |
| − | |[[]] [[]] | + | |Just-In-Time Compiler for Verilog from VMware Research |
| + | |[[https://svnweb.freebsd.org/ports/head/cad/cascade-compiler/pkg-descr?revision=HEAD]] [[https://github.com/vmware/cascade]] | ||
|- | |- | ||
| − | | | + | |chipvault |
| − | |[[]] [[]] | + | |Project organizer for VHDL and Verilog RTL hardware designs |
| + | |[[https://svnweb.freebsd.org/ports/head/cad/chipvault/pkg-descr?revision=HEAD]] [[http://chipvault.sourceforge.net/]] | ||
|- | |- | ||
| | | | ||
Revision as of 10:01, 14 January 2020
Welcome to the CAD
|
| App/Package | Abstract | Addition or Link |
|---|---|---|
| CalculiX-ccx | Three-Dimensional Structural Finite Element Program | [[1]] [[2]] |
| CuraEngine | Engine of slicing solution for RepRap 3D printers | [[3]] [[4]] |
| FreeCAD | General purpose 3D CAD modeller | [[5]] [[6]] |
| NASTRAN | NASA Structural Analysis System | [[7]] [[8]] |
| abc | System for sequential synthesis and verification | [[9]] [[10]] |
| admesh | Program for processing STL triangulated solid meshes | [[11]] [[12]] |
| adms | Model generator for SPICE simulators | [[13]] [[14]] |
| alliance | Complete set of CAD tools and libraries for VLSI design | [[15]] [[16]] |
| astk-client | Graphical interface for Code_Aster (client side) | [[17]] [[18]] |
| astk-serveur | Graphical interface for Code_Aster (server side) | [[19]] [[20]] |
| atlc | Tool to calculate the impedance of transmission lines | [[21]] [[22]] |
| basicdsp | Program for experimenting with simple audio DSP algorithms | [[23]] [[24]] |
| brlcad | CSG modelling system from the US Ballistic Research Laboratory | [[25]] [[26]] |
| calculix | Three-Dimensional Structural Finite Element Program | [[27]] [[28]] |
| caneda | EDA software suite focused on ease of use and portability | [[29]] [[30]] |
| cascade | Simple tool to analyze noise and distortion of a RF system | [[31]] [[32]] |
| cascade-compiler | Just-In-Time Compiler for Verilog from VMware Research | [[33]] [[34]] |
| chipvault | Project organizer for VHDL and Verilog RTL hardware designs | [[35]] [[36]] |
| [[]] [[]] | ||
| [[]] [[]] | ||
| If you don't find a package, you are looking for, we recommend to search the  Ports Collection.
| ||
Back to the  Office Applications
| ||
